This blog post is a bit unusual because all I’m able to write about are problems.

In short I made up my FLEX6000 dev board but could not get it to function.

Here it is in all of its glory:

As you can see, I didn’t bother to fully populate it. The route cause of the problem, I suspect, is that Passive Serial (PDF) programming of the FPGA does not work with the USB-Blaster (PDF) programmer I have. I’m fairly sure of this because even if I remove the programmer and unplug it from the computer the software still reports that the FPGA was “programmed successfully”. This is obviously not right. Examining the programming lines with the Logic Analyser also shows no activity at all when it is supposedly programming. Irritatingly if I had noticed this behaviour from the Altera Quartus software I would not have bothered with this approach at all, since it entails working blind.

In the course of laying out and making up the PCB, including the drilling, I did learn a few things:

• The gEDA pcb program continues to be a source of frustration, especially for drawing up boards that I make up at home. This is because pads have to be enlarged slightly and drill holes made slightly smaller to guide the drill bit. But there is no automation for this so I frequently end up editing the .pcb file by hand in a text editor.
• IDC connectors require huge amounts of board space. Once again I underestimated how much room to set asside at both the long and short edges of these connectors. Luckily a regular dual row PCB header did the job.
• Drilling is very tedious and not helped by drilling bits which “pull up” the copper as the bit is lifted up. I have bought some new bits to help with this.
• 1mm holes are especially awkward and a few times I drilled out the pad. This was especially likely to happen when the pad had no connected trace.

lordbubsy, on the 6502.org forums, helped me out by sending me some of the catalogue paper he uses when doing toner transfers. It helped a lot to get nice and reliable transfers, as you can see in the following picture:

The etch went well too, with only a couple of drop outs:

I’m quite pleased with how the board came out, especially considering I used 10mil signal traces, the same width as on the boards I designed that were made up professionally.

So despite the circuit not actually being useful the board was the best made so far, some dodgy drilling notwithstanding.

So after all that effort all I have to show for it is a FLEX6000 (PDF) attached to a TQFP adapter board, and I’m not even 100% certain that I did that correctly.

Not to get too distressed about these problems I have already started to plan my next steps.

As I mentioned in my last post, a more suitable FPGA for my purposes is the FLEX10K (PDF) series. It has a few advantages over the 6000:

• It has useable static RAM bits inside. This means registers can be implemented as memory bits, instead of dedicating logic to them. This should prove especially useful to my MMU design, which will need 8 bits of register per page (so at least 8 by 16 bits). I currently have no idea how to exploit this in my VHDL but I’m sure I will figure that out.
• Most importantly it supports the EPC2 (PDF) flash, which is reprogrammable. Intrestinhly this appears to only be available in PLCC20.
• Both the FPGA and the flash are programmable via JTAG.

To keep things simple, I will use the FPGA in PLCC. This will mean I won’t have to struggle with attaching parts to adapters, but mostly it means the final computer board, when I eventually make it up, will have almost exclusively through hole parts which should make routing the layout with only two layers possible.

As an aside, I do intend to “crack” SMT board layout and construction in a future project. I have most of the tools required and have even bought some SMT parts to practice with. But mixing through hole parts with tiny pitch SMT parts makes for a strange board design, and doesn’t have that retro feel.

As I mentioned in my last post, using PLCC parts for the FPGA will mean I will require two of them, since there are not enough IO pins – each 84 pin part has only 59 IO pins – to support all the functionality I want in a single device. My very rough thinking for the custom logic is as follows

“MuDdy”” custom design (MMU and DMA):

• Core logic; address decoder and interrupt routing
• DMA controller
• MMU

“DisCo” custom design (Disk Controller):

• IDE controller
• SPI master, using 65SPI or similar
• Sound (beeper or more complex)

I will go into more details about these designs in a future post, but for now I want to make sure the FPGA is suitable, and after the problem I had with the FLEX6000, will actually work. So I will order the FPGA and flash parts from my favourite Chinese supplier, UTSource. But Instead of making up a complex dev board right away, I will build up a circuit in stages:

First to verify that the flash is programmable I will attach one to some breadboard with the JTAG header. This will require a PLCC20 to DIP adapter, which I will make up myself just for the fun of it. And if I have trouble making one up, they are about 2 pounds from China via eBay.

Next I will verify that the FPGA can also be programmed over JTAG. This will also be done with a PLCC84 adapter. Luckily, about a year ago, lordbubsy sent me one.

Assuming I get this far, I can either make up a PCB containing all the parts – I will make the dev board simpler then the FLEX6000 one by omitting the AVR – or I could see if its possible to use breadboards to verify that I can configure the FPGA from the flash. I will probably try the breadboard approach first.

So that’s where I am now. Progress has slowed a lot in the last six months. Hopefully things will pick up in the coming weeks…